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High-performance computing
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#	Item
211	Design of Parallel and High-Performance Computing Fall 2015 Lecture: Organization of the Course Instructor: Torsten Hoefler & Markus Püschel Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-09-20 17:31:12
212	Operational Intensity  Design of Parallel and High-Performance Computing Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-11-16 07:05:20 Sandy Bridge Intel Core Nehalem Cache Central processing unit Computer memory Sandy Bridge-E
213	Design of Parallel and High Performance Computing HS 2013 Markus P¨ uschel, Torsten Hoefler Department of Computer Science ETH Zurich Add to Reading List Source URL: spcl.inf.ethz.ch - Date: 2013-11-07 10:36:50
214	Design of Parallel and High Performance Computing HS 2014 Torsten Hoefler, Markus P¨ uschel Department of Computer Science ETH Zurich Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2014-10-24 04:19:58
215	The Next Generation of High Performance Computing William Gropp www.cs.illinois.edu/~wgropp Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2016-08-16 11:52:11 Parallel computing GPGPU Video cards Graphics hardware Concurrent computing Kepler Graphics processing unit Cray Supercomputer K computer GeForce Appro
216	Design of Parallel and High-Performance Computing Fall 2015 Lecture: Lock-Free and distributed memory Motivational video: https://www.youtube.com/watch?v=PuCx50FdSic Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-11-30 04:19:15 Concurrency control Lock Consensus Non-blocking algorithm Linearizability Thread Synchronization Parallel computing Ticket lock Monitor
217	Design of Parallel and High Performance Computing HS 2014 Torsten Hoefler, Markus P¨ uschel Department of Computer Science ETH Zurich Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2014-10-21 09:18:38 X86 G-code
218	Design of Parallel and High-Performance Computing Fall 2014 Lecture: Cache Coherence & Memory Models Instructor: Torsten Hoefler & Markus Püschel Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2014-10-12 15:57:01 Computer architecture Computer memory Cache coherency Concurrent computing Parallel computing Cache Random-access memory Shared memory CPU cache Memory hierarchy
219	Dynamic video produces powerful results for systems integrator Silicon Mechanics, Inc. is a leading provider of servers, storage and high-performance computing technologies to the world’s Add to Reading List Source URL: www.voxuspr.com Language: English - Date: 2016-01-18 13:33:34
220	European Technology Platform for High Performance Computing ETP 4 HPC Vision Paper Add to Reading List Source URL: www.etp4hpc.eu Language: English Supercomputing Eurotech Appro Cluster computing PlanetHPC Parallel computing Bright Computing

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